Publications

Press Coverage

• Design News: "DesignCon Honors Up-and-Coming Engineers"

• Semiconductor Engineering: "Secure Physical Design Roadmap Enabling End-To-End Trustworthy IC Design Flow"

• Semiconductor Engineering: "Week in Review: Design, Low Power: July 22"

• Semiconductor Engineering: "Technical Paper Round-Up: July 26"

• Semiconductor Engineering: "Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design"

• Semiconductor Engineering: "Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-Chip Power Grid Network"

• Semiconductor Engineering: "PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning"

• Semiconductor Engineering: "PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks using Cooperative Coevolution"

• Semiconductor Engineering: "Technical Paper Round-Up: April 19"

Publications as Postdoctoral Reseacher at University of Florida

• Sukanta Dey, Jungmin Park, Nitin Pundir, Dipayan Saha, Amit Mazumder Shuvo, Dhwani Mehta, Navid Asadi, Fahim Rahman, Farimah Farahmandi, and Mark Tehranipoor, "Secure Physical Design", in Future Microelectronics Security Research Series, June 2022, University of Florida. [IACR][PDF]

• Henian Li, Sukanta Dey, and Farimah Farahmandi, "Physically-aware Laser Fault Injection Assessment", in Government Microelectronic Applications and Critical Technology Conference (GOMACTech 2023), March 20-23, 2023, San Diego, CA, USA.

PhD Dissertation

• Sukanta Dey, "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective", Ph.D. Dissertation, Submitted to IIT Guwahati, March 2021.

PhD Dissertation Related Publications

• Sukanta Dey, Sukumar Nandi, Gaurav Trivedi, "PGOpt: Multi-objective Design Space Exploration Framework for Large-Scale On-Chip Power Grid Design in VLSI SoC using Evolutionary Computing Technique" in Microprocessors and Microsystems (MICPRO), Elsevier, Vol. 81, Article 103440, March 2021.

• Sukanta Dey, Sukumar Nandi, Gaurav Trivedi, "Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-Chip Power Grid Network", ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 25, No. 5, Article 42, July 2020.[PDF]

• Sukanta Dey, Sukumar Nandi, Gaurav Trivedi, "Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design", 20th IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2021), Tampa, Florida, USA, July 7-9, 2021, IEEE. [Conference Rank - B1][Slide][Video][PDF]

• Sukanta Dey, Sukumar Nandi, Gaurav Trivedi, "PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning", IEEE/ACM Design, Automation and Test in Europe (DATE 2020), Grenoble, France, 9-13th March 2020, pp. 1520-1525.[Acceptance rate: 196/748=26%, Conference Rank - A1] [Slide]

• Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi, "PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks using Cooperative Coevolution", 17th IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2018), Hong Kong SAR, China, 9-11th July 2018, pp. 40-45, IEEE. [Acceptance rate: 54/192=28.12%, Conference Rank - B1][PDF]

• Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi, "Markov Chain Model using Levy Flight for VLSI Power Grid Analysis", 30th International Conference on VLSI Design (VLSID 2017), Hyderabad, India, 7-11th January 2017, pp. 107-112, IEEE. [Acceptance rate: 71/292=24.31%, Conference Rank - A2]

• Sukanta Dey, Sukumar Nandi, Gaurav Trivedi, "PGRDP: Reliability, Delay, and Power-Aware Area Minimization of Large-Scale VLSI Power Grid Network using Cooperative Coevolution", in the Book: Intelligent Computing Paradigam - Recent Trends, Springer (Chapter 6).
  

• [PhD Forum] Sukanta Dey, "Analysis and Optimization of Reliability Issues of VLSI Power Grid Networks", IEEE/ACM Design, Automation and Test in Europe (DATE 2019), Florence, Italy, 25-29th March 2019. [Conference Rank - A1]

Other Publications

• Sukanta Dey, Pradeepkumar Bhale, Sukumar Nandi, "ReFIT: Reliability Challenges and Failure Rate Mitigation Techniques for IoT Systems", 20th International Conference on Innovations for Community Services (I4CS 2020), Bhubaneswar, India, 12-14th January 2020, Springer CCIS. (accepted) [Acceptance rate: 16/46=34.7%, Conference Rank - C]

• Pradeepkumar Bhale, Sukanta Dey, Santosh Biswas, Sukumar Nandi, "Energy Efficient Approach to Detect Sinkhole Attack using Roving IDS in 6LoWPAN Network", 20th International Conference on Innovations for Community Services (I4CS 2020), Bhubaneswar, India, 12-14th January 2020, Springer CCIS. (accepted) [Acceptance rate: 16/46=34.7%, Conference Rank - C]

• Sukanta Dey, Abhishek Kumar, Mehul Sawarkar, Pranav Kumar Singh, Sukumar Nandi, "EvadePDF: Towards Evading Machine Learning based PDF Malware Classifiers", 2nd ISEA International Conference on Security and Privacy (ISEA-ISAP 2018), Jaipur, India, 9-13th January 2019, Springer CCIS. [Acceptance rate: 21/85=24.7%]

• Pranav Kumar Singh, Anish V Monsy, Rajan Garg, Sukanta Dey, Sukumar Nandi, "JSpongeGen: A Pseudo Random Generator for Low Resource Devices", 15th International Conference on Distributed Computing and Internet Technology (ICDCIT) 2019, Bhubaneswar, India, 10-13th January 2019, Springer LNCS. [Acceptance rate: 18/120=15%, Conference Rank - C]

• Satyabrata Dash, Sukanta Dey, Anish J. Augustine, Rudra Sankar Dhar, Jan Pidanič, Zdeněk Němec, Gaurav Trivedi "RiverOpt: A Multiobjective Optimization Framework based on Modified River Formation Dynamics Heuristic", 32nd International Conference on VLSI Design (VLSID 2019), Delhi, India, 5-9th January 2019, IEEE. [Acceptance rate: 84/316=26.58%, Double Blind Review, Conference Rank - A2]

• Satyabrata Dash, Sukanta Dey, Deepak Joshi, Gaurav Trivedi, "Minimizing Area of VLSI Power Grid Networks using River Formation Dynamics.", Journal of Systems and Information Technology (JSIT), Emerald, Vol 20, Issue 4, pp 417-429, 2018. [Scopus indexed, Q2, SJR=0.4]
  

• Satyabrata Dash, Deepak Joshi, Sukanta Dey, Meenali Janveja, Gaurav Trivedi, "StormOptimus: A single objective constrained optimizer based on brainstorming process for VLSI circuits", in the Book: Brain Storm Optimization Algorithms: Concepts, Principles and Applications, Springer Verlag (Chapter 9).