BiographySukanta is working as a Senior EDA Engineer at Intel Corporation, Santa Clara, CA. Previously, he was a Postdoctoral Research Associate at the Department of Electrical and Computer Engineering (ECE), University of Florida, Gainesville, FL, US. He received his Master’s and Ph.D. from the Department of Computer Science and Engineering, IIT Guwahati in March 2021, specializing in Machine Learning techniques for Electronic Design Automation (EDA). His Ph.D. thesis title is "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective". Prior to joining IIT Guwahati, he received his Bachelor's in Electronics and Telecommunication Engineering from Assam Engineering College in July 2014. His domain of expertise includes EDA, VLSI CAD, VLSI Physical Design, Machine Learning for VLSI CAD, Custom IC Design (Analog and Mixed Signal), RTL to GDS2 Flow (ASIC Design), and Hardware Security/Security-Aware EDA. His research works have been published in reputed EDA journals/conferences, such as ACM TODAES journal, IEEE/ACM DATE, IEEE ISVLSI, IEEE/ACM VLSID conferences. He has served as a technical program committee member, expert reviewer, and organizing committees of premier ACM and IEEE conferences, including Design Automation Conference (DAC), International Symposium on Hardware Oriented Security and Trust (HOST), and VLSI Design Conference (VLSID). He also serves as a research paper reviewer for reputed IEEE and IET journals. His research was supported by SRC, DARPA, AFRL, DoD, Analog Devices, ANSYS, and Cisco. He is a member of IEEE and ACM. Industrial Experiences
Academics
|