Seminar Talks /Presentation
Invited talk on, "Architecting the IoT Revolution: Innovations in IC Design Technologies for Seamless Connectivity" at 8th International Conference on IoT and Connected Technologies (ICIoTCT 2023) at NIT Mizoram, India, on Oct 14th, 2023.
Internal talk on, "Hierarchical Probing in Postlayout Analog Design/Simulation" at Intel Corporation, Santa Clara, CA, USA, on July 24th, 2023.
Invited talk on, "Machine Learning for Chip Design" at 3rd International Conference on Computational Intelligence & Internet of Things (ICCIIoT 2022), at NERIST, Arunachal Pradesh, India, on 24th Feb, 2023. (online) [Video]
Internal talk on, "AI/ML and Data Engineering for Secure Physical Design" at FICS Research, Dept of ECE, University of Floirda, Gainesville, FL, USA, on Jan 25, 2022.
Presented an invited talk, "AI/ML for VLSI" at Vellore Institute of Technology, Chennai, India on 11th December, 2021.
Presented a talk, "Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design" at 20th IEEE Computer Society Annual Symposium on VLSI (Virtual)
Tampa, Florida, USA, July 7-9, 2021 on 9th July, 2021. (online) [Video] [Slide]
Presented an invited talk, "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective" at FICS Research Lab, University of Florida on 17th June, 2021.
Presented my PhD defense seminar, "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective" at IIT Guwahati on 22nd March, 2021. [Slide]
Presented a talk, "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective" at 34th International Conference on VLSI Design (VLSID 2021) on 24th February, 2021. (online) [Video] [Slide]
Presented an invited talk, "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective" at Dept. of CSE, The Chinese University of Hong Kong (CUHK), Hong Kong on 5th September, 2020. (online)
Presented an invited talk and tutorial, "Learning Tensorflow for Developing Machine Learning Models" at Workshop on “Signal Processing and Machine Learning”, organized by Dept. of ECE, Assam Don Bosco University on 11th July, 2020. [Code and Slide link]
Presented PhD Synopsis seminar, "Design Methodology for On-Chip Power Grid Interconnect: AI/ML Perspective" at Dept. of CSE, IIT Guwahati on 30th June, 2020.
Presented a long presentation talk, "Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning" at Design, Automation,Test in Europe Conference (DATE 2020), April 2020, Grenoble, France.
Presented a research talk, "On-Chip Power Planning in VLSI Physical Design" at Reserach Seminar Series, Dept. of CSE, IIT Guwahati on 18th February, 2020.
Presented a research talk, "Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution" at 17th IEEE Computer Society Annual Symposium on VLSI, The Hong Kong Polytechnic University (PolyU), Hong Kong SAR, China on 9th July, 2018.
Presented a research talk, "Markov Chain Model Using Lévy Flight for VLSI Power Grid Analysis" at VLSI Design Conference 2017, HICC, Hyderabad, India on 10th January, 2017.
Community Service
Research Paper Reviewers
Conferences: VLSID 2022, IEEE S&P 2021, DAC 2018, DAC 2019, DAC 2020, DAC 2021; EEEP 2018; MEIE 2019; SocPros 2019, SocPros 2020;
Journals: IEEE TCAD; IEEE TVLSI; ACM TODAES; IEEE Access; IET Computer and Digital Techniques; IET Electronics Letters; IET Circuits, Devices, & Systems; IET Signal Processing; IET Image Processing; IET Wireless Sensor Systems.
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